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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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SCANSWITCHTM
MJW16206
POWER TRANSISTORS 12 AMPERES 1200 VOLTS -- VCES 50 and 150 WATTS
NPN Bipolar Power Deflection Transistors For High and Very High Resolution CRT Monitors
The MJF16206 and the MJW16206 are state-of-the-art SWITCHMODE bipolar power transistors. They are specifically designed for use in horizontal deflection circuits for high and very high resolution, monochrome and color CRT monitors. * * * * * * * * 1200 Volt VCES Breakdown Capability Typical Dynamic Desaturation Specified (New Turn-Off Characteristic) Maximum Repetitive Emitter-Base Avalanche Energy Specified (Industry First) High Current Capability: Performance Specified at 6.5 Amps Continuous Rating -- 12 Amps Max Pulsed Rating -- 15 Amps Max Isolated MJF16206 is UL Recognized Fast Switching: 100 ns Inductive Fall Time (Typ) 1000 ns Inductive Storage Time (Typ) Low Saturation Voltage 0.25 Volts (Typ) at 6.5 Amps Collector Current High Emitter-Base Breakdown Capability For High Voltage Off Drive Circuits -- 8.0 V (Min)
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MAXIMUM RATINGS
Rating Symbol VCES Value 1200 500 8.0 -- -- Unit Vdc Vdc Vdc Collector-Emitter Breakdown Voltage Collector-Emitter Sustaining Voltage Emitter-Base Voltage VCEO(sus) VEBO Isolation Voltage (RMS for 1 sec., TA = 25_C, Relative Humidity 30%) VISOL Vrms
v
Figure 19 Figure 20
CASE 340F-02 TO-247AE
Collector Current -- Continuous Collector Current -- Pulsed (1) Base Current -- Continuous Base Current -- Pulsed (1)
IC ICM IB IBM
12 15
Adc Adc
5.0 10 0.2
Repetitive Emitter-Base Avalanche Energy
W(BER) PD
mjoules Watts W/_C
Total Power Dissipation @ TC = 25_C Total Power Dissipation @ TC = 100_C Derated above 25_C Operating and Storage Temperature
150 39 1.49
TJ, Tstg
- 55 to + 150
_C
THERMAL CHARACTERISTICS
Characteristic
Symbol RJC TL
Max
Unit
Thermal Resistance -- Junction to Case
0.67 260
_C/W _C
Lead Temperature for Soldering Purposes 1/8 from the Case for 5 seconds
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle
v 10%.
SCANSWITCH is a trademark of Motorola Inc.
REV 2
(c) Motorola, Inc. 1995 Motorola Bipolar Power Transistor Device Data
1
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MJW16206
(1) Pulse Test: Pulse Width = 300 s, Duty Cycle SWITCHING CHARACTERISTICS DYNAMIC CHARACTERISTICS ON CHARACTERISTICS (1) OFF CHARACTERISTICS (1)
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Inductive Load (Figure 15) (IC = 6.5 A, IB = 1.5 A) Storage Fall Time
Collector-Heatsink Capacitance -- MJF16206 Isolated Package (Mounted on a 1 x 2 x 1/16 Copper Heatsink, VCE = 0, ftest = 100 kHz)
Gain Bandwidth Product (VCE = 10 Vdc, IC = 0.5 A, ftest = 1.0 MHz)
Output Capacitance (VCE = 10 Vdc, IE = 0, ftest = 100 kHz)
Emitter-Base Avalanche Turn-off Energy (Figure 15) (t = 500 ns, RBE = 22 )
Dynamic Desaturation Interval (Figure 15) (IC = 6.5 Adc, IB = 1.5 Adc, LB = 0.5 H)
DC Current Gain (IC = 1.0 Adc, VCE = 5.0 Vdc) (IC = 10 Adc, VCE = 5.0 Vdc) (IC = 12 Adc, VCE = 5.0 Vdc)
Base-Emitter Saturation Voltage (IC = 6.5 Adc, IB = 1.5 Adc)
Collector-Emitter Saturation Voltage (IC = 3.0 Adc, IB = 400 mAdc) (IC = 6.5 Adc, IB = 1.5 Adc)
Emitter-Base Breakdown Voltage (IE = 1.0 mA, IC = 0)
Collector-Emitter Sustaining Voltage (Figure 10) (IC = 10 mAdc, IB = 0)
Emitter-Base Leakage (VEB = 8.0 Vdc, IC = 0)
Collector Cutoff Current (VCE = 1200 Vdc, VBE = 0 V) (VCE = 850 Vdc, VBE = 0 V)
2
Characteristic
v 2.0%.
VCEO(sus)
V(BR)EBO
VCE(sat)
VBE(sat)
Symbol
Motorola Bipolar Power Transistor Device Data
EB(off) Cc-hs IEBO ICES Cob hFE tds tsv tfi fT Min 500 8.0 -- 5.0 3.0 -- -- -- -- -- -- -- -- -- -- -- -- -- 1000 100 0.15 0.25 Typ 180 250 3.0 0.9 24 8.0 6.0 17 30 11 -- -- -- -- 2250 250 Max 350 250 25 1.5 1.0 1.0 25 -- 13 -- -- -- -- -- -- -- joules Adc Adc MHz Unit Vdc Vdc Vdc Vdc pF pF ns ns --
MJW16206
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) 100 70 50 hFE , DC CURRENT GAIN 30 20 10 7 5 3 2 1 0.2 5 3 2 1 0.7 0.5 0.3 0.2 0.1 0.07 0.05 0.2 0.3 IC/IB1 = 10 10 5 TJ = 25C TJ = 100C TJ = 100C 25C - 55C
VCE = 5 V
0.3
3 57 2 0.5 0.7 1 IC, COLLECTOR CURRENT (AMPS)
10
20
0.5 0.7
1
2
3
5
7
10
20
IC, COLLECTOR CURRENT (AMPS)
Figure 1. Typical DC Current Gain
Figure 2. Typical Collector-Emitter Saturation Voltage
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
TJ = 25C 8A IC = 2 A 4A 6.5 A 10 A
3 2 1 0.7 0.5 0.3 0.2 0.1 0.07 0.05 0.07 0.1
VBE, BASE-EMITTER VOLTAGE (VOLTS)
7 5
10 7 5 3 2 1 0.7 0.5 0.3 0.2 0.1 0.2 TJ = 25C TJ = 100C 0.3 0.5 0.7 1 2 3 5 7 10 20 IC/IB1 = 5 to 10
0.2 0.3 0.5 0.7 1 IB, BASE CURRENT (AMPS)
2
3
5
IC, COLLECTOR CURRENT (AMPS)
Figure 3. Typical Collector Saturation Region
Figure 4. Typical Base-Emitter Saturation Voltage
Cib
f T, TRANSITION FREQUENCY (MHz)
10K 7K 5K 3K 2K C, CAPACITANCE (pF) 1K 700 500 300 200 100 70 50 30 20
10 7 5 3 2 1 0.7 0.5 0.3 0.2 0.1 0.1
Cob TC = 25C f = 1 MHz
f(test) = 1 MHz TC = 25C VCE = 10 V
10 0.1 0.2 0.3 0.5
1
2 3 5 7 10 20 30 50 100 200 300 500 1K
0.2
0.3
0.5 0.7
1
2
3
5
7
10
VR, REVERSE VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (AMPS)
Figure 5. Typical Capacitance
Figure 6. Typical Transition Frequency
Motorola Bipolar Power Transistor Device Data
3
MJW16206
SAFE OPERATING AREA INFORMATION
30 20 IC, COLLECTOR CURRENT (AMPS) 10 5 3 2 1 0.5 0.3 0.2 0.1 0.05 0.03 0.02 WIREBOND LIMIT THERMAL LIMIT SECONDARY BREAKDOWN LIMIT MJW16206 dc 5 ms 100 ns II* 10 s IC, COLLECTOR CURRENT (AMPS) 20 16 IC/IB1 5 TJ 100C
12
8
VBE(off) = 5 V 0V 2V
4
0 1 20 30 50 23 5 10 100 200 300 500 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) 1K 0 200 400 600 800 1K 1.2K VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
*REGION II -- EXPANDED FBSOA USING MUR8100E, ULTRAFAST RECTIFIER (SEE FIGURE 12)
Figure 8. Maximum Reverse Bias Safe Operating Area
Figure 7. Maximum Forward Biased Safe Operating Area
FORWARD BIAS There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC - VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 7 is based on TC = 25_C; T J(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when TC 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 7 may be found at any case temperature by using the appropriate curve on Figure 9. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. REVERSE BIAS Inductive loads, in most cases, require the emitter-to- base junction be reversed biased because high voltage and high current must be sustained simultaneously during turn- off. Under these conditions, the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as
POWER RATING FACTOR (%)
100 90 80 70 60 50 40 30 20 10 0 25 50 75 100 125 150 THERMAL DERATING SECOND BREAKDOWN DERATING
TC, CASE TEMPERATURE (C)
Figure 9. Power Derating
active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Biased Safe Operating Area and represents the voltage-current condition allowable during reverse biased turn-off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 8 gives the RBSOA characteristics.
4
Motorola Bipolar Power Transistor Device Data
MJW16206
0.02 F H.P. 214 OR EQUIV. P.G. + 0 - 35 V 0.02 F 50 500 100 -V +- 1 F RBSOA L = 200 H RB2 = 0 VCC = 20 Volts RB1 selected for desired IB1 V(BR)CEO L = 10 mH RB2 = VCC = 20 Volts T1 (ICpk [ LcoilCC ) V IB2 RB2 2N5337 - 100 + V 11 V
2N6191 20 10 F RB1 A
T1 0V
+V IC -V *IC L T.U.T. MR856 *IB VCC Vclamp IB VCE IB1 VCE(pk)
IC(pk)
A 50
T1 adjusted to obtain IC(pk)
*Tektronix P-6042 or Equivalent
Note: Adjust - V to obtain desired VBE(off) at Point A.
Figure 10. RBSOA/V(BR)CEO(sus) Test Circuit
1 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) 0.5 D = 0.5
0.2 0.1 0.05
0.2 0.1 RJC(t) = r(t) RJC RJC = 0.67C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RJC(t) 10 t, TIME (ms) 100 P(pk)
SINGLE PULSE
t1
t2
DUTY CYCLE, D = t1/t2 1K 10K
0.01 0.1 1
Figure 11. Thermal Response
VCE (1000 V MAX) 10 F MUR8100 +15 1 F 100 MTP8P10 MPF930 +10 MUR105 MPF930 MUR105 50 RB2 MTP12N10 MJE210 150 VOff Note: Test Circuit for Ultrafast FBSOA Note: RB2 = 0 and VOff = - 5 Volts 1 F T.U.T. RB1 100 F MTP8P10 10 mH
150
MUR1100
500 F
Figure 12. Switching Safe Operating Area Motorola Bipolar Power Transistor Device Data 5
MJW16206
DYNAMIC DESATURATION
DYNAMIC DESATURATION The SCANSWITCH series of bipolar power transistors are specifically designed to meet the unique requirements of horizontal deflection circuits in computer monitor applications. Historically, deflection transistor design was focused on minimizing collector current fall time. While fall time is a valid figure of merit, a more important indicator of circuit performance as scan rates are increased is a new characteristic, "dynamic desaturation." In order to assure a linear collector current ramp, the output transistor must remain in hard saturation during storage time and exhibit a rapid turn-off transition. A sluggish transition results in serious consequences. As the saturation voltage of the output transistor increases, the voltage across the yoke drops. Roll off in the collector current ramp results in improper beam deflection and distortion of the image at the right edge of the screen. Design changes have been made in the structure of the SCANSWITCH series of devices which minimize the dynamic desaturation interval. Dynamic desaturation has been defined in terms of the time required for the VCE to rise from 1.0 to 5.0 volts (Figures 13 and 14) and typical performance at optimized drive conditions has been specified. Optimization of device structure results in a linear collector Current ramp, excellent turn-off switching performance, and significantly lower overall power dissipation.
5 VCE 4 DYNAMIC DESATURATION TIME IS MEASURED FROM VCE = 1 V TO VCE = 5 V
90% IC(pk)
tfi VCE
IC VCE = 20 V 0 tsv 0 0% IB 10% IC(pk)
COLLECTOR-EMITTER VOLTAGE (VOLTS)
3
2
1
0 tds TIME (ns)
Figure 13. Deflection Simulator Switching Waveforms From Circuit in Figure 15
Figure 14. Definition of Dynamic Desaturation Measurement
6
Motorola Bipolar Power Transistor Device Data
MJW16206
EMITTER-BASE TURN-OFF ENERGY Typical techniques for driving horizontal outputs rely on a pulse transformer to supply forward base current, and a turn-off network that includes a series base inductor to limit the rate of transition from forward to reverse drive. An alternate drive scheme has been used to characterize the SCANSWITCH series of devices (see Figure 15). This circuit produces a ramp of base drive, eliminating the heavy overdrive at the beginning of the collector current ramp and underdrive just prior to turnoff produced by typical drive strategies. This high performance drive has two additional important advantages. First, the configuration of T1 allows LB to be placed outside the path of forward base current making it unnecessary to expend energy to reverse current flow as in a series base inductor. Second, there is no base resistor to limit forward base current and hence no power loss associated with setting the value of the forward base current. The process of generating the ramp stores rather than dissipates energy. Tailoring the amount of energy stored in T1 to the amount of energy, EB (off) , that is required to turn-off the output transistor results in essentially lossless operation. [Note: B+ and the primary inductance of T1 (LP) are chosen such that 1/2 LP Ib2 = EB(off)].
+ 24 V
U2 MC7812 VI + C1 100 F GND VO
R13 1K
R14 150
C7 110 pF
Q2 MJ11016 (IB)
R16 430 R1 1K R5 1K (IC) Q5 MJ11016
Q6 2N5401 + C2 10 F R17 MDC1000A 120 C4 0.005 7 OSC R3 250 8 % 6 VCC OUT GND R6 1K 2 1 U1 MC1391P R12 470 1W LB = 0.5 H CY = 0.01 F LY = 13 H C5 0.1
+ C3 10 F
3.9 V C6 100 F + LY
R7 2.7K
R8 9.1K
R9 470
Q3 MTP3055E
R15 10K
D2 SCANSWITCH DAMPER DIODE LB
CY
VCE Q4 SCANSWITCH HORIZ OUTPUT TRANSISTOR R4 22
T1
D1 MUR110
T1: FERROXCUBE POT CORE #1811P3C8 T1: PRIMARY SEC. TURNS RATIO = 13:4 T1: GAPPED FOR LP = 30 H
Figure 15. High Resolution Deflection Application Simulator
Motorola Bipolar Power Transistor Device Data
7
MJW16206
+15
ts and tf
1 F
150
100
100 F MTP8P10 MTP8P10 RB1 A
V(off) adjusted to give specified off drive
MPF930 +10 V MPF930 MUR105
VCC IC IB1 IB2 RB1 RL
250 V 6.5 A 1.3 A Per Fig. 17 & 18 7.7 38
50 500 F 150 Voff A *IB
MTP12N10
MJE210 1 F
T.U.T. *IC VCC RL
Figure 16. Resistive Load Switching
10 7 5 t, TIME ( s) t, TIME (ns) 3 2 IC/IB1 = 5 TC = 25C IB2 = IB1
1000 700 500 300 200 IB2 = IB1
1 0.7 0.5 1
IB2 = 2 (IB1)
100 70 50
IC/IB = 5 TC = 25C
IB2 = 2 (IB1)
2 3 5 10 7 IC, COLLECTOR CURRENT (AMPS)
20
1
2
3
5
7
10
20
IC, COLLECTOR CURRENT (AMPS)
Figure 17. Typical Resistive Storage Time
Figure 18. Typical Resistive Fall Time
8
Motorola Bipolar Power Transistor Device Data
MJW16206
TEST CONDITIONS FOR ISOLATION TESTS*
MOUNTED FULLY ISOLATED PACKAGE LEADS MOUNTED FULLY ISOLATED PACKAGE
0.099" MIN LEADS
HEATSINK 0.110" MIN
HEATSINK
Figure 19. Screw or Clip Mounting Position for Isolation Test Number 1
Figure 20. Screw or Clip Mounting Position for Isolation Test Number 2
* Measurement made between leads and heatsink with all leads shorted together.
MOUNTING INFORMATION**
4-40 SCREW PLAIN WASHER CLIP
HEATSINK COMPRESSION WASHER NUT HEATSINK
Figure 21. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions. Destructive laboratory tests show that using a hex head 4-40 screw, without washers, and applying a torque in excess of 20 in . lbs will cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability. Additional tests on slotted 4-40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, Motorola does not recommend exceeding 10 in . lbs of mounting torque under any mounting conditions.
** For more information about mounting power semiconductors see Application Note AN1040.
Motorola Bipolar Power Transistor Device Data
9
MJW16206
PACKAGE DIMENSIONS
0.25 (0.010)
M
-Q- TBM
-T- E -B- U C
4
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. DIM A B C D E F G H J K L P Q R U V MILLIMETERS MIN MAX 20.40 20.90 15.44 15.95 4.70 5.21 1.09 1.30 1.50 1.63 1.80 2.18 5.45 BSC 2.56 2.87 0.48 0.68 15.57 16.08 7.26 7.50 3.10 3.38 3.50 3.70 3.30 3.80 5.30 BSC 3.05 3.40 BASE COLLECTOR EMITTER COLLECTOR INCHES MIN MAX 0.803 0.823 0.608 0.628 0.185 0.205 0.043 0.051 0.059 0.064 0.071 0.086 0.215 BSC 0.101 0.113 0.019 0.027 0.613 0.633 0.286 0.295 0.122 0.133 0.138 0.145 0.130 0.150 0.209 BSC 0.120 0.134
L
A
R
1 2 3
K
P
-Y-
F D 0.25 (0.010)
M
V G
H J
YQ
S
STYLE 3: PIN 1. 2. 3. 4.
CASE 340F-03 TO-247AE ISSUE E
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Motorola Bipolar Power Transistor Device Data
*MJW16206/D*
MJW16206/D

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